Decision feedback equalizers (“DFEs”) are often used in high speed chip-to-chip signaling systems to estimate signaling-channel response to previously transmitted symbols and feed the estimated response back to digital “decision” circuitry, generally in the form of an adjusted signal level. The digital decision circuitry, in turn, resolves the DFE-adjusted signal level into a digital sample.
Despite enabling increased signaling margin (and thus lower bit error rates (BER) and/or faster signaling rates, DFEs generally require an uninterrupted symbol transmission stream to yield the channel-response estimation and thus find limited application in bursty signaling systems.